Load commercial SRAM, FRAM, MRAM, and Flash memory chips with known data patterns and monitor single-event upset rates correlated with orbital position. Produce a reliability dataset for the semiconductor and space communities.
Load commercial SRAM, FRAM, MRAM, and Flash memory chips with known data patterns and monitor single-event upset rates correlated with orbital position. Produce a reliability dataset for the semiconductor and space communities.
This is a intermediate-level project with an estimated timeline of 10-14 months using a 0.5U form factor.
The electronics inside a satellite are constantly bombarded by high-energy particles that can flip individual bits in memory events called single-event upsets. Different memory technologies respond differently to this bombardment: some are inherently more resistant than others, and the industry's assumptions about which technologies are hardest are largely based on ground-based accelerator testing rather than actual orbital data. This experiment loads several types of commercial memory chips with known data patterns and continuously monitors them for bit flips, recording exactly when and where in orbit each upset occurs. Correlating upset rates with orbital position especially passages through the South Atlantic Anomaly and with concurrent radiation sensor data produces a dataset that is directly valuable to the semiconductor and space electronics communities. The payload is essentially a test board with memory chips and a monitoring microcontroller mechanically simple but scientifically meaningful. For universities with semiconductor research programs, this creates a bridge between device physics and real orbital validation that can support publications and future grant proposals.
Custom PCB with 4-8 commercial memory ICs: SRAM (IS62WV1288, ~$3), FRAM (Fujitsu MB85RS256, ~$5, SPI), MRAM (Everspin MR25H256, ~$8, SPI), Flash (Winbond W25Q128, ~$2, SPI). Each pre-loaded with known data patterns (checkerboard, walking-1, all-zeros). MCU (SAMD21 or STM32) continuously reads and compares, logging bit-flip address/time/orbital-position. Correlate upsets with GPS position data (especially South Atlantic Anomaly passes). Include temperature sensor (TMP117, I2C, ~$5) to separate thermal effects from radiation.
Builds directly on Vanderbilt ISDE expertise and RadFxSat heritage. University of Montpellier MTCube demonstrated this exact approach COTS memory testing on a CubeSat. ISDE has decades of radiation effects research on semiconductors. Combined with PIN diode dosimeter and GPS position logging, produces dataset directly useful to semiconductor reliability community. FRAM and MRAM are theoretically more radiation-tolerant than SRAM this experiment validates that claim with in-situ data. Cost: $300-$1,500 for memory ICs + custom PCB + payload controller. Complexity: medium straightforward PCB design for ECE students. Payload is essentially a PCB with memory chips and a microcontroller.
This project spans 4 disciplines, making it suitable for interdisciplinary student teams.
Ready to take on this project? Here's a general roadmap that applies to most CubeSat missions:
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